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Waymo Common Problems

ML Accelerator and Efficiency Optimization

System DesigneasyLast reported July 2026
By AceOffer · Updated July 2026 · Reported 1× across 190+ candidate reports

Understanding the Problem

One of three independent system design rounds at Waymo for an ML System (runtime/optimization) role. This round focuses on ML accelerator techniques and efficiency optimization. Topics covered include: Quantization-Aware Training (QAT), knowledge distillation, model evaluation (model eval()), contrastive learning, kernel optimization, memory layout strategies, and kernel fusion. Candidates are expected to discuss both high-level algorithmic choices (e.g., when to apply quantization vs. distillation) and low-level hardware/software efficiency concerns (e.g., memory access patterns, kernel fusion for reducing memory bandwidth pressure). A companion system design round covers inference system design for 100M DAU (back-of-envelope estimation of memory, bandwidth, latency; OOM mitigation). A third system design round covers ML framework design.

Functional Requirements

Structured requirements coming soon. For now, see the full problem statement above and the deep-dive prompts below.

Non-Functional Requirements

Latency, throughput, availability, consistency targets — being authored.

The Set Up

Defining the Core Entities

Core entities (Request, Batch, Worker, Cache, etc.) — being authored.

The API

POST /endpoint → describe request shape GET /endpoint → describe response shape (API spec being authored)

High-Level Design

Component diagram + walkthrough mapping each functional requirement to a system flow — being authored.

Potential Deep Dives

These are the directions the interviewer is likely to push you. Each one has multiple valid solutions at different quality tiers.

1)How does QAT differ from post-training quantization in terms of accuracy recovery and deployment complexity? (when: Candidate mentions QAT)

Bad
Naive approach with serious trade-off — being authored.
Good
Solid baseline with reasonable trade-offs — being authored.
Great
Production-grade approach with explicit trade-off rationale — being authored.

2)How would you fuse a sequence of elementwise operations with a matrix multiplication to improve efficiency? (when: Candidate discusses kernel optimization)

Bad
Naive approach with serious trade-off — being authored.
Good
Solid baseline with reasonable trade-offs — being authored.
Great
Production-grade approach with explicit trade-off rationale — being authored.

3)When would you prefer NHWC over NCHW and why? (when: Candidate discusses memory layout)

Bad
Naive approach with serious trade-off — being authored.
Good
Solid baseline with reasonable trade-offs — being authored.
Great
Production-grade approach with explicit trade-off rationale — being authored.

What is Expected at Each Level?

L4 / Mid-level
Cover happy path. Clarify scope. Identify the obvious bottleneck. Pick a reasonable storage and reasonable scaling approach.
L5 / SeniorTarget
All of the above plus: explicit failure handling, durability vs latency trade-offs, choose the right batching/caching strategy, articulate why.
L6 / Staff+
All of the above plus: organizational concerns (rollout, migration, on-call), quantitative analysis, multi-region considerations, what could go wrong with the proposed solution at 10x scale.

Insider Notes

**Common mistakes:** Conflating PTQ and QAT without distinguishing training-time vs. post-training calibration; Missing low-level memory layout implications when discussing kernel optimization; Not connecting optimization choices to hardware roofline model (compute-bound vs. memory-bandwidth-bound); In the debug coding companion round: missing tensor aliasing bugs (Matrix.zeros), missing axis=1 in to_ndarray, misunderstanding truncation behavior in from_ndarray **What passers do:** Demonstrating depth across both algorithmic (QAT, distillation) and systems-level (kernel fusion, memory layout) topics; Linking efficiency techniques explicitly to hardware constraints (bandwidth, FLOP/byte ratio); Clear, structured discussion of tradeoffs for each technique **Why people fail:** Being caught off-guard by the debug coding round (numpy/tensor aliasing bugs); the companion debug round was noted as the most likely failure point; Surface-level answers on kernel optimization without concrete hardware or implementation knowledge **Edge cases probed:** Interaction between eval() mode and quantization (e.g., batch norm freezing during QAT); Memory aliasing bugs in tensor operations (e.g., Matrix.zeros aliasing, to_ndarray missing axis=1, truncation of remainders in from_ndarray) **Alternative approaches:** Compiler-level optimization (TVM, XLA, TensorRT) (Automated and portable, but may not reach hand-tuned kernel performance; requires understanding of compiler IR and cost models.); Pruning + sparse execution (Can yield high compression ratios but requires hardware/library support for sparse ops (e.g., NVIDIA A100 structured sparsity); accuracy recovery is non-trivial.)
Waymo · System Design · Last reported July 2026